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    <title>Asic on Pi Stack</title>
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      <title>cocotb vs VUnit vs UVM in 2026: Picking a Hardware Verification Framework</title>
      <link>https://www.pistack.xyz/posts/2026-11-07-cocotb-vs-vunit-vs-uvm-hardware-verification-frameworks/</link>
      <pubDate>Sat, 07 Nov 2026 00:00:00 +0000</pubDate>
      <guid>https://www.pistack.xyz/posts/2026-11-07-cocotb-vs-vunit-vs-uvm-hardware-verification-frameworks/</guid>
      <description>&lt;p&gt;Half the engineering effort on a modern chip goes into proving it works. Verification outnumbers design three to one at most fabs, and the framework you pick decides whether that effort is spent writing tests or fighting testbench infrastructure.&lt;/p&gt;</description>
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      <title>OpenROAD vs OpenLane vs KLayout in 2026: The Open-Source Chip Design Stack Compared</title>
      <link>https://www.pistack.xyz/posts/2026-11-07-openroad-vs-openlane-vs-klayout-open-source-asic-flow/</link>
      <pubDate>Sat, 07 Nov 2026 00:00:00 +0000</pubDate>
      <guid>https://www.pistack.xyz/posts/2026-11-07-openroad-vs-openlane-vs-klayout-open-source-asic-flow/</guid>
      <description>&lt;p&gt;A single 5nm mask set costs more than $15 million. That number is why most hardware startups never see their own silicon. But the economics changed at the older nodes: with an open PDK such as SkyWater SKY130 or GlobalFoundries GF180MCU, a small team can push real RTL through place-and-route, DRC, LVS and stream out a GDSII file for a few thousand dollars in shuttle fees. The toolchain that makes this possible is fully open source — and it is the same stack used on silicon that has actually shipped.&lt;/p&gt;</description>
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